Evolver: A deep learning processor with on-device quantization–voltage–frequency tuning F Tu, W Wu, Y Wang, H Chen, F Xiong, M Shi, N Li, J Deng, T Chen, L Liu, ... IEEE Journal of Solid-State Circuits 56 (2), 658-673, 2020 | 58 | 2020 |
A 28nm 27.5 TOPS/W approximate-computing-based transformer processor with asymptotic sparsity speculating and out-of-order computing Y Wang, Y Qin, D Deng, J Wei, Y Zhou, Y Fan, T Chen, H Sun, L Liu, ... 2022 IEEE international solid-state circuits conference (ISSCC) 65, 1-3, 2022 | 53 | 2022 |
Fact: Ffn-attention co-optimized transformer architecture with eager correlation prediction Y Qin, Y Wang, D Deng, Z Zhao, X Yang, L Liu, S Wei, Y Hu, S Yin Proceedings of the 50th Annual International Symposium on Computer …, 2023 | 29 | 2023 |
A 28nm 276.55 TFLOPS/W sparse deep-neural-network training processor with implicit redundancy speculation and batch normalization reformulation Y Wang, Y Qin, D Deng, J Wei, T Chen, X Lin, L Liu, S Wei, S Yin 2021 Symposium on VLSI Circuits, 1-2, 2021 | 25 | 2021 |
An energy-efficient transformer processor exploiting dynamic weak relevances in global attention Y Wang, Y Qin, D Deng, J Wei, Y Zhou, Y Fan, T Chen, H Sun, L Liu, ... IEEE Journal of Solid-State Circuits 58 (1), 227-242, 2022 | 18 | 2022 |
Trainer: An energy-efficient edge-device training processor supporting dynamic weight pruning Y Wang, Y Qin, D Deng, J Wei, T Chen, X Lin, L Liu, S Wei, S Yin IEEE Journal of Solid-State Circuits 57 (10), 3164-3178, 2022 | 17 | 2022 |
STC: Significance-aware transform-based codec framework for external memory access reduction F Xiong, F Tu, M Shi, Y Wang, L Liu, S Wei, S Yin 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 16 | 2020 |
PL-NPU: An energy-efficient edge-device DNN training processor with posit-based logarithm-domain computing Y Wang, D Deng, L Liu, S Wei, S Yin IEEE Transactions on Circuits and Systems I: Regular Papers 69 (10), 4042-4055, 2022 | 12 | 2022 |
SWPU: A 126.04 TFLOPS/W edge-device sparse DNN training processor with dynamic sub-structured weight pruning Y Wang, Y Qin, L Liu, S Wei, S Yin IEEE Transactions on Circuits and Systems I: Regular Papers 69 (10), 4014-4027, 2022 | 11 | 2022 |
7.7 CV-CIM: a 28nm XOR-derived similarity-aware computation-in-memory for cost-volume construction Z Yue, Y Wang, H Wang, Y Wang, R Guo, L Tang, L Liu, S Wei, Y Hu, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 1-3, 2023 | 8 | 2023 |
HPPU: An energy-efficient sparse DNN training processor with hybrid weight pruning Y Wang, Y Qin, L Liu, S Wei, S Yin 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits …, 2021 | 8 | 2021 |
Reconfigurability, why it matters in ai tasks processing: A survey of reconfigurable ai chips S Wei, X Lin, F Tu, Y Wang, L Liu, S Yin IEEE Transactions on Circuits and Systems I: Regular Papers 70 (3), 1228-1241, 2022 | 7 | 2022 |
A 28nm 77.35 TOPS/W Similar Vectors Traceable Transformer Processor with Principal-Component-Prior Speculating and Dynamic Bit-wise Stationary Computing Y Wang, Y Qin, D Deng, X Yang, Z Zhao, R Guo, Z Yue, L Liu, S Wei, Y Hu, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 5 | 2023 |
LPE: Logarithm posit processing element for energy-efficient edge-device training Y Wang, D Deng, L Liu, S Wei, S Yin 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits …, 2021 | 5 | 2021 |
34.1 A 28nm 83.23 TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications Y Wang, X Yang, Y Qin, Z Zhao, R Guo, Z Yue, H Han, S Wei, Y Hu, S Yin 2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 566-568, 2024 | 2 | 2024 |
15.1 A 0.795 fJ/bit Physically-Unclonable Function-Protected TCAM for a Software-Defined Networking Switch Z Yue, X Xiang, F Tu, Y Wang, Y Wang, S Wei, Y Hu, S Yin 2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 276-278, 2024 | 1 | 2024 |
CIMFormer: A 38.9 TOPS/W-8b Systolic CIM-Array Based Transformer Processor with Token-Slimmed Attention Reformulating and Principal Possibility Gathering R Guo, Y Wang, X Chen, L Wang, H Sun, J Wei, L Liu, S Wei, Y Hu, S Yin 2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2023 | 1 | 2023 |
A 28nm 49.7 TOPS/W Sparse Transformer Processor with Random-Projection-Based Speculation, Multi-Stationary Dataflow, and Redundant Partial Product Elimination Y Qin, Y Wang, D Deng, X Yang, Z Zhao, Y Zhou, Y Fan, J Wei, T Chen, ... 2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2023 | | 2023 |