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Harish Patil
Harish Patil
Verified email at intel.com
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Cited by
Cited by
Year
Pin: building customized program analysis tools with dynamic instrumentation
CK Luk, R Cohn, R Muth, H Patil, A Klauser, G Lowney, S Wallace, ...
Acm sigplan notices 40 (6), 190-200, 2005
56552005
Pinpointing representative portions of large intel® itanium® programs with dynamic instrumentation
H Patil, R Cohn, M Charney, R Kapoor, A Sun, A Karunanidhi
37th International Symposium on Microarchitecture (MICRO-37'04), 81-92, 2004
4302004
Asim: A performance model framework
J Emer, P Ahuja, E Borch, A Klauser, CK Luk, S Manne, SS Mukherjee, ...
Computer 35 (2), 68-76, 2002
3202002
Pinplay: a framework for deterministic replay and reproducible analysis of parallel programs
H Patil, C Pereira, M Stallcup, G Lueck, J Cownie
Proceedings of the 8th annual IEEE/ACM international symposium on Code …, 2010
2942010
Low‐cost, concurrent checking of pointer and array accesses in C programs
H Patil, C Fischer
Software: Practice and Experience 27 (1), 87-110, 1997
1741997
Analyzing parallel programs with pin
M Bach, M Charney, R Cohn, E Demikhovsky, T Devor, K Hazelwood, ...
Computer 43 (3), 34-41, 2010
1582010
Efficient Run-time Monitoring Using Shadow Processing.
H Patil, CN Fischer
AADEBUG 95, 1-14, 1995
891995
Ispike: a post-link optimizer for the intel/spl reg/itanium/spl reg/architecture
CK Luk, R Muth, H Patil, R Cohn, G Lowney
International Symposium on Code Generation and Optimization, 2004. CGO 2004 …, 2004
852004
Automatic logging of operating system effects to guide application-level architecture simulation
S Narayanasamy, C Pereira, H Patil, R Cohn, B Calder
Proceedings of the joint international conference on Measurement and …, 2006
832006
Drdebug: Deterministic replay based cyclic debugging with dynamic slicing
Y Wang, H Patil, C Pereira, G Lueck, R Gupta, I Neamtiu
Proceedings of annual IEEE/ACM international symposium on code generation …, 2014
642014
An elimination algorithm for bidirectional data flow problems using edge placement
DM Dhamdhere, H Patil
ACM Transactions on Programming Languages and Systems (TOPLAS) 15 (2), 312-336, 1993
571993
Profile-guided post-link stride prefetching
CK Luk, R Muth, H Patil, R Weiss, PG Lowney, R Cohn
Proceedings of the 16th international conference on Supercomputing, 167-178, 2002
552002
Method and apparatus for debugging of optimized code using emulation
R Mirani, BA Olsen, H Patil
US Patent 6,434,741, 2002
522002
Combining static and dynamic branch prediction to reduce destructive aliasing
H Patil, J Emer
Proceedings Sixth International Symposium on High-Performance Computer …, 2000
432000
Fast computational gpu design with gt-pin
M Kambadur, S Hong, J Cabral, H Patil, CK Luk, S Sajid, MA Kim
2015 IEEE International Symposium on Workload Characterization, 76-86, 2015
412015
A new framework for debugging globally optimized code
LC Wu, R Mirani, H Patil, B Olsen, WW Hwu
ACM SIGPLAN Notices 34 (5), 181-191, 1999
331999
PinADX: an interface for customizable debugging with dynamic instrumentation
G Lueck, H Patil, C Pereira
Proceedings of the Tenth International Symposium on Code Generation and …, 2012
302012
Cross binary simulation points
E Perelman, J Lau, H Patil, A Jaleel, G Hamerly, B Calder
2007 IEEE International Symposium on Performance Analysis of Systems …, 2007
232007
Profile-guided stride prefetching
CK Luk, H Patil, R Muth, P Lowney, R Cohn, R Weiss
US Patent App. 09/999,889, 2003
212003
Pinballs: Portable and shareable user-level checkpoints for reproducible analysis and simulation
H Patil, T Carlson
REPRODUCE: Proceedings of the Workshop on Reproducible Research Methodologies, 2014
192014
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