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Jürgen Teich
Jürgen Teich
Full Professor, Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg
E-mailová adresa ověřena na: cs.fau.de
Název
Citace
Citace
Rok
Scratch: programming for all
M Resnick, J Maloney, A Monroy-Hernández, N Rusk, E Eastmond, ...
Communications of the ACM 52 (11), 60-67, 2009
52392009
Strategies for finding good local guides in multi-objective particle swarm optimization (MOPSO)
S Mostaghim, J Teich
Proceedings of the 2003 IEEE Swarm Intelligence Symposium. SIS'03 (Cat. No …, 2003
9702003
Hardware/software codesign: The past, the present, and predicting the future
J Teich
Proceedings of the IEEE 100 (Special Centennial Issue), 1411-1430, 2012
4852012
Pareto-front exploration with uncertain objectives
J Teich
International Conference on Evolutionary Multi-Criterion Optimization, 314-328, 2001
3342001
System-level synthesis using evolutionary algorithms
T Blickle, J Teich, L Thiele
Design Automation for Embedded Systems 3, 23-58, 1998
3141998
Opt4J: a modular framework for meta-heuristic optimization
M Lukasiewycz, M Glaß, F Reimann, J Teich
Proceedings of the 13th annual conference on Genetic and evolutionary …, 2011
3122011
SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications
J Keinert, M Streubūhr, T Schlichter, J Falk, J Gladigau, C Haubelt, J Teich, ...
ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1 …, 2009
2502009
Electronic system-level synthesis methodologies
A Gerstlauer, C Haubelt, AD Pimentel, TP Stefanov, DD Gajski, J Teich
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
2492009
Digitale Hardware/Software-Systeme: Synthese und Optimierung
J Teich, C Haubelt
Springer-Verlag, 2007
2452007
Dynoc: A dynamic infrastructure for communication in dynamically reconfugurable devices
C Bobda, A Ahmadinia, M Majer, J Teich, S Fekete, J van der Veen
International Conference on Field Programmable Logic and Applications, 2005 …, 2005
2152005
Invasive computing: An overview
J Teich, J Henkel, A Herkersdorf, D Schmitt-Landsiedel, ...
Multiprocessor system-on-chip: hardware design and tool integration, 241-268, 2011
2022011
ReCoBus-Builder—A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS
D Koch, C Beckhoff, J Teich
2008 International conference on field programmable logic and applications …, 2008
1862008
FlexRay schedule optimization of the static segment
M Lukasiewycz, M Glaß, J Teich, P Milbredt
Proceedings of the 7th IEEE/ACM international conference on Hardware …, 2009
1822009
Covering pareto-optimal fronts by subswarms in multi-objective particle swarm optimization
S Mostaghim, J Teich
Proceedings of the 2004 Congress on Evolutionary Computation (IEEE Cat. No …, 2004
1642004
Optimal FPGA module placement with temporal precedence constraints
S Fekete, E Kohler, J Teich
Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001
1612001
The role of/spl epsi/-dominance in multi objective particle swarm optimization methods
S Mostaghim, J Teich
The 2003 Congress on Evolutionary Computation, 2003. CEC'03. 3, 1764-1771, 2003
1582003
HIPAcc: A Domain-Specific Language and Compiler for Image Processing
R Membarth, O Reiche, F Hannig, J Teich, M Körner, W Eckert
IEEE Transactions on Parallel and Distributed Systems 27 (1), 210-224, 2015
1492015
CAN+: A new backward-compatible Controller Area Network (CAN) protocol with up to 16× higher data rates.
T Ziermann, S Wildermann, J Teich
2009 Design, Automation & Test in Europe Conference & Exhibition, 1088-1093, 2009
1452009
The Erlangen Slot Machine: A dynamically reconfigurable FPGA-based computer
M Majer, J Teich, A Ahmadinia, C Bobda
The Journal of VLSI Signal Processing Systems for Signal, Image, and Video …, 2007
1452007
Partitioning of processor arrays: A piecewise regular approach
J Teich, L Thiele
Integration 14 (3), 297-332, 1993
1381993
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Články 1–20