Masoud Dehyadegari

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Zainalabedin NavabiProfessor of Electrical and Computer Engineering, University of TehranVerified email at ut.ac.ir
Ali Afzali-KushaUniversity of TehranVerified email at ut.ac.ir
Mohsen NickrayDepartment of Computer and Information Technology, Faculty of Engineering, University of QomVerified email at qom.ac.ir
Morteza RezaalipourPh.D. Student, Università della Svizzera italianaVerified email at usi.ch
Siamak MohammadiAssociate Professor of Electrical and Computer Eng., University of TehranVerified email at ut.ac.ir
Mahdi Nazm BojnordiAssistant Professor, School of Computing, University of UtahVerified email at cs.utah.edu
Arash AramiUniversity of WaterlooVerified email at uwaterloo.ca
Sarvenaz TajasobMaster's student, K. N. Toosi University of TechnologyVerified email at email.kntu.ac.ir
Masoud DaneshtalabProfessor, Mälardalen University, SwedenVerified email at mdh.se
Reza KakoeeFacebookVerified email at fb.com
Luca BeniniETH Zürich, Università di BolognaVerified email at unibo.it
Andrea MarongiuAssociate Professor, University of Modena and Reggio EmiliaVerified email at unimore.it
Juha PlosilaProfessor, University of Turku (UTU), FinlandVerified email at utu.fi
Mohammad RezaalipourPhD Student, Università della Svizzera italianaVerified email at usi.ch
zahra kokhazadPh.D. Candidate, Aristotle University of ThessalonikiVerified email at csd.auth.gr
Mehdi KamalUniversity of Southern CaliforniaVerified email at usc.edu
seyyed alireza hoseiniUniversity of TehranVerified email at iesys.ir
Arezoo KamranAsistant Professor, Razi University, Kermanshah, Iran.Verified email at razi.ac.ir
Ashkan SobhaniPhD Electrical and Computer Engineering, University of OttawaVerified email at uottawa.ca
Masoumeh (Azin) EbrahimiAssociate professor at KTH, Sweden

Masoud Dehyadegari

K. N. Toosi University of Technology

Verified email at kntu.ac.ir - Homepage

Many-core architecture - Embedded System Design - Network-on-chip


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Evaluation of pseudo adaptive XY routing using an object oriented model for NOC M Dehyadgari, M Nickray, A Afzali-Kusha, Z Navabi 2005 International Conference on Microelectronics, 5 pp., 2005	111	2005
Emotion on FPGA: Model driven approach MR Jamali, A Arami, M Dehyadegari, C Lucas, Z Navabi Expert Systems with Applications 36 (4), 7369-7378, 2009	50	2009
Real-time embedded emotional controller MR Jamali, M Dehyadegari, A Arami, C Lucas, Z Navabi Neural Computing and Applications 19, 13-19, 2010	47	2010
An adaptive fuzzy logic-based routing algorithm for networks-on-chip M Dehyadegari, M Daneshtalab, M Ebrahimi, J Plosila, S Mohammadi 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 208-214, 2011	39	2011
Power and delay optimization for network on chip M Nickray, M Dehyadgari, A Afzali-Kusha Proceedings of the 2005 European Conference on Circuit Theory and Design …, 2005	32	2005
Fuzzy-based adaptive routing algorithm for networks-on-chip M Ebrahimi, H Tenhunen, M Dehyadegari Journal of Systems Architecture 59 (7), 516-527, 2013	31	2013
Adaptive routing using context-aware agents for networks on chips M Nickray, M Dehyadgari, A Afzali-kusha 2009 4th International Design and Test Workshop (IDT), 1-6, 2009	22	2009
A tightly-coupled multi-core cluster with shared-memory HW accelerators M Dehyadegari, A Marongiu, MR Kakoee, L Benini, S Mohammadi, ... 2012 international conference on embedded computer systems (SAMOS), 96-103, 2012	20	2012
A New Protocol Stack Model for Network on Chip M Dehyadgari, M Nickray, A Afzali-kusha, Z Navabi IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and …, 2006	20	2006
Architecture support for tightly-coupled multi-core clusters with shared-memory HW accelerators M Dehyadegari, A Marongiu, MR Kakoee, S Mohammadi, N Yazdani, ... IEEE Transactions on Computers 64 (8), 2132-2144, 2014	19	2014
Memristive data ranking AK Prasad, M Rezaalipour, M Dehyadegari, MN Bojnordi 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021	14	2021
Toward embedded emotionally intelligent system MR Jamali, M Valadbeigi, M Dehyadegari, Z Navabi, C Lucas Proc. IEEE EWDTS, 51-56, 2007	13	2007
Designing energy-efficient imprecise adders with multi-bit approximation S Tajasob, M Rezaalipour, M Dehyadegari Microelectronics Journal 89, 41-55, 2019	12	2019
A novel ultra low power accuracy configurable adder at transistor level AM Hassani, M Rezaalipour, M Dehyadegari 2018 8th International Conference on Computer and Knowledge Engineering …, 2018	9	2018
Designing efficient imprecise adders using multi-bit approximate building blocks S Tajasob, M Rezaalipour, M Dehyadegari, MN Bojnordi Proceedings of the International Symposium on Low Power Electronics and …, 2018	9	2018
DrAx: An automatic approach to designing more precise and energy-efficient approximate adders M Rezaalipour, S Tajasob, M Dehyadegari, MN Bojnordi 2018 Real-Time and Embedded Systems and Technologies (RTEST), 8-15, 2018	7	2018
G-arrays: Geometric arrays for efficient point cloud processing H Roodaki, M Dehyadegari, MN Bojnordi ICASSP 2021-2021 IEEE International Conference on Acoustics, Speech and …, 2021	6	2021
AxMAP: Making Approximate Adders Aware of Input Patterns M Rezaalipour, M Rezaalipour, M Dehyadegari, MN Bojnordi IEEE Transaction on Computers, 1-1, 2020	6	2020
Enhanced graph processing in PIM accelerators with improved queue management MA Mosayebi, AM Hasani, M Dehyadegari Microelectronics Journal 94, 104637, 2019	4	2019
Dual-purpose custom instruction identification algorithm based on particle swarm optimization M Kamal, NK Amiri, A Kamran, SA Hoseini, M Dehyadegari, H Noori ASAP 2010-21st IEEE International Conference on Application-specific Systems …, 2010	4	2010

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