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David Trilla
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Cache side-channel attacks and time-predictability in high-performance critical real-time systems
D Trilla, C Hernandez, J Abella, FJ Cazorla
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
322018
Resilient random modulo cache memories for probabilistically-analyzable real-time systems
D Trilla, C Hernandez, J Abella, FJ Cazorla
2016 IEEE 22nd International Symposium on On-Line Testing and Robust System …, 2016
82016
SafeSU: an extended statistics unit for multicore timing interference
G Cabo, F Bas, R Lorenzo, D Trilla, S Alcaide, M Moretó, C Hernández, ...
2021 IEEE European Test Symposium (ETS), 1-4, 2021
62021
Improving early design stage timing modeling in multicore based real-time systems
D Trilla, J Jalle, M Fernandez, J Abella, FJ Cazorla
2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS …, 2016
62016
De-RISC: the first RISC-V space-grade platform for safety-critical systems
NJ Wessman, F Malatesta, J Andersson, P Gomez, M Masmano, ...
2021 IEEE Space Computing Conference (SCC), 17-26, 2021
52021
De-RISC–Dependable Real-Time Infrastructure for Safety-Critical Computer Systems
F Gómez, M Masmano, V Nicolau, J Andersson, J Le Rhun, D Trilla, ...
Ada User Journal 41 (2), 107-112, 2020
52020
SafeDE: a flexible diversity enforcement hardware module for light-lockstepping
F Bas, S Alcaide, R Lorenzo, G Cabo, G Gil, O Sala, F Mazzocchetti, ...
2021 IEEE 27th International Symposium on On-Line Testing and Robust System …, 2021
42021
Aging assessment and design enhancement of randomized cache memories
D Trilla, C Hernandez, J Abella, FJ Cazorla
IEEE Transactions on Device and Materials Reliability 17 (1), 32-41, 2017
42017
SafeTI: a hardware traffic injector for MPSoC functional and timing validation
O Sala, S Alcaide, G Cabo, F Bas, R Lorenzo, P Benedicte, D Trilla, G Gil, ...
2021 IEEE 27th international symposium on on-line testing and robust system …, 2021
32021
Multi-vehicle map fusion using GNU Radio
EA Sisbot, A Vega, A Paidimarri, JD Wellman, A Buyuktosunoglu, P Bose, ...
Proceedings of the GNU Radio Conference 4 (1), 2019
32019
Novia: A framework for discovering non-conventional inline accelerators
D Trilla, JD Wellman, A Buyuktosunoglu, P Bose
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
22021
Worst-Case Energy Consumption: A New Challenge for Battery-Powered Critical Devices
D Trilla, C Hernandez, J Abella, FJ Cazorla
IEEE Transactions on Sustainable Computing 6 (3), 522-530, 2019
22019
Modeling the impact of process variations in worst-case energy consumption estimation
D Trilla, C Hernandez, J Abella, FJ Cazorla
2019 22nd Euromicro Conference on Digital System Design (DSD), 601-605, 2019
12019
Non-functional considerations of time-randomized processor architectures
D Trilla Rodríguez
Universitat Politècnica de Catalunya, 2020
2020
An Approach for Detecting Power Peaks during Testing and Breaking Systematic Pathological Behavior
D Trilla, C Hernandez, J Abella, FJ Cazorla
2019 22nd Euromicro Conference on Digital System Design (DSD), 538-545, 2019
2019
Randomization for safer, more reliable and secure, high-performance automotive processors
D Trilla, FJ Cazorla, C Hernandez, J Abella
IEEE Design & Test 36 (6), 39-47, 2019
2019
Modelling bus contention during system early design stages
D Trilla, C Hernandez, J Abella, FJ Cazorla
2017 12th IEEE International Symposium on Industrial Embedded Systems (SIES …, 2017
2017
On the suitability of time-randomized processors for secure and reliable high-performance computing
D Trilla, C Hernandez, J Abella Ferrer, FJ Cazorla Almeida
Book of abstracts, 110-113, 2017
2017
Time-randomized Processors for Secure and Reliable High-Performance Computing
D Trilla, C Hernández
Four birds with one stone: On the use of time-randomized processors to address the time-predictability, reliability, energy and security challenges of real-time autonomous systems
D Trilla, C Hernandez, J Abella, FJ Cazorla
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Articles 1–20