Vlad-Mihai Sima
Vlad-Mihai Sima
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A survey and evaluation of FPGA high-level synthesis tools
R Nane, VM Sima, C Pilato, J Choi, B Fort, A Canis, YT Chen, H Hsiao, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
Hardware acceleration of BWA-MEM genomic short read mapping for longer read lengths
EJ Houtgast, VM Sima, K Bertels, Z Al-Ars
Computational biology and chemistry 75, 54-64, 2018
DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler
R Nane, VM Sima, B Olivier, R Meeuws, Y Yankova, K Bertels
22nd International Conference on Field Programmable Logic and Applications …, 2012
An FPGA-based systolic array to accelerate the BWA-MEM genomic mapping algorithm
EJ Houtgast, VM Sima, K Bertels, Z Al-Ars
2015 international conference on embedded computer systems: Architectures …, 2015
Heterogeneous hardware/software acceleration of the BWA-MEM DNA alignment algorithm
N Ahmed, VM Sima, E Houtgast, K Bertels, Z Al-Ars
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 240-246, 2015
FPGA acceleration of the pair-HMMs forward algorithm for DNA sequence analysis
S Ren, VM Sima, Z Al-Ars
2015 IEEE International Conference on Bioinformatics and Biomedicine (BIBM …, 2015
Hartes: Hardware-software codesign for heterogeneous multicore platforms
K Bertels, VM Sima, Y Yankova, G Kuzmanov, W Luk, G Coutinho, ...
IEEE micro 30 (5), 88-97, 2010
GPU-accelerated BWA-MEM genomic mapping algorithm using adaptive load balancing
EJ Houtgast, VM Sima, K Bertels, Z Al-Ars
Architecture of Computing Systems–ARCS 2016: 29th International Conference …, 2016
Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures
G Mariani, VM Sima, G Palermo, V Zaccaria, C Silvano, K Bertels
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012
Runtime decision of hardware or software execution on a heterogeneous reconfigurable platform
VM Sima, K Bertels
2009 IEEE International Symposium on Parallel & Distributed Processing, 1-6, 2009
High performance streaming Smith-Waterman implementation with implicit synchronization on intel FPGA using OpenCL
E Houtgast, VM Sima, Z Al-Ars
2017 IEEE 17th International Conference on Bioinformatics and Bioengineering …, 2017
Compiler assisted runtime task scheduling on a reconfigurable computer
M Sabeghi, VM Sima, K Bertels
2009 International Conference on Field Programmable Logic and Applications …, 2009
High-level synthesis in the delft workbench hardware/software co-design tool-chain
R Nane, VM Sima, CP Quoc, F Goncalves, K Bertels
2014 12th IEEE International Conference on Embedded and Ubiquitous Computing …, 2014
An efficient gpuaccelerated implementation of genomic short read mapping with bwamem
EJ Houtgast, VM Sima, K Bertels, Z AlArs
ACM SIGARCH Computer Architecture News 44 (4), 38-43, 2017
REFLECT: Rendering FPGAs to multi-core embedded computing
JMP Cardoso, PC Diniz, Z Petrov, K Bertels, M Hübner, H van Someren, ...
Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, 261-289, 2011
Power-efficiency analysis of accelerated BWA-MEM implementations on heterogeneous computing platforms
EJ Houtgast, VM Sima, G Marchiori, K Bertels, Z Al-Ars
2016 international conference on reconfigurable computing and fpgas …, 2016
Quipu: A statistical model for predicting hardware resources
R Meeuws, SA Ostadzadeh, C Galuzzi, VM Sima, R Nane, K Bertels
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 6 (1), 1-25, 2013
Hartes toolchain early evaluation: Profiling, Compilation and HDL generation
K Bertels, G Kuzmanov, EM Panainte, G Gaydadjiev, Y Yankova, ...
2007 International Conference on Field Programmable Logic and Applications …, 2007
Area constraint propagation in high level synthesis
R Nane, VM Sima, K Bertels
2012 International Conference on Field-Programmable Technology, 247-252, 2012
Intra-application data-communication characterization
I Ashraf, V Sima, K Bertels
Proc. 1st Int. Workshop Commun. Archit. Extreme Scale, 1-11, 2015
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