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Reza Kakoee
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Title
Cited by
Cited by
Year
A fully-synthesizable single-cycle interconnection network for shared-l1 processor clusters
A Rahimi, I Loi, MR Kakoee, L Benini
2011 Design, Automation & Test in Europe, 1-6, 2011
1322011
A distributed and topology-agnostic approach for on-line NoC testing
MR Kakoee, V Bertacco, L Benini
Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on …, 2011
732011
At-speed distributed functional testing to detect logic and delay faults in NoCs
MR Kakoee, V Bertacco, L Benini
IEEE Transactions on Computers 63 (3), 703-717, 2013
722013
Modified pseudo LRU replacement algorithm
H Ghasemzadeh, S Mazrouee, MR Kakoee
13th Annual IEEE International Symposium and Workshop on Engineering of …, 2006
662006
ReliNoC: A reliable network for priority-based on-chip communication
MR Kakoee, V Bertacco, L Benini
2011 Design, Automation & Test in Europe, 1-6, 2011
472011
Reliable network-on-chip based on generalized de Bruijn graph
M Hosseinabady, MR Kakoee, J Mathew, DK Pradhan
2007 IEEE International High Level Design Validation and Test Workshop, 3-10, 2007
462007
Fine-grained power and body-bias control for near-threshold deep sub-micron CMOS circuits
MR Kakoee, L Benini
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1 (2 …, 2011
262011
Variation-tolerant architecture for ultra low power shared-l1 processor clusters
MR Kakoee, I Loi, L Benini
IEEE Transactions on Circuits and Systems II: Express Briefs 59 (12), 927-931, 2012
242012
Low latency and energy efficient scalable architecture for massive NoCs using generalized de Bruijn graph
M Hosseinabady, MR Kakoee, J Mathew, DK Pradhan
IEEE transactions on very large scale integration (VLSI) systems 19 (8 …, 2010
232010
Using integer equations for high level formal verification property checking
B Alizadeh, MR Kakoee
Fourth International Symposium on Quality Electronic Design, 2003 …, 2003
202003
A tightly-coupled multi-core cluster with shared-memory HW accelerators
M Dehyadegari, A Marongiu, MR Kakoee, L Benini, S Mohammadi, ...
2012 international conference on embedded computer systems (SAMOS), 96-103, 2012
192012
Automatic synthesis of near-threshold circuits with fine-grained performance tunability
MR Kakoee, A Sathanur, A Pullini, J Huisken, L Benini
2010 ACM/IEEE International Symposium on Low-Power Electronics and Design …, 2010
192010
Architecture support for tightly-coupled multi-core clusters with shared-memory HW accelerators
M Dehyadegari, A Marongiu, MR Kakoee, S Mohammadi, N Yazdani, ...
IEEE Transactions on Computers 64 (8), 2132-2144, 2014
152014
Enhancing the testability of RTL designs using efficiently synthesized assertions
MR Kakoee, M Riazati, S Mohammadi
9th International Symposium on Quality Electronic Design (isqed 2008), 230-235, 2008
152008
A new approach for design and verification of transaction level models
MR Kakoee, H Shojaei, H Ghasemzadeh, M Sirjani, Z Navabi
2007 IEEE International Symposium on Circuits and Systems, 3760-3763, 2007
142007
A new physical routing approach for robust bundled signaling on NoC links
MR Kakoee, I Loi, L Benini
Proceedings of the 20th symposium on Great lakes symposium on VLSI, 3-8, 2010
132010
HW/SW architecture for soft-error cancellation in real-time operating system
K MR, M Daneshtalab, S Safari
IEICE Electronics Express 4 (23), 755-761, 2007
132007
Improving robustness of Real-Time Operating Systems (RTOS) services related to soft-errors
MH Neishaburi, M Daneshtalab, MR Kakoee, S Safari
2007 IEEE/ACS International Conference on Computer Systems and Applications …, 2007
122007
A multi-banked shared-l1 cache architecture for tightly coupled processor clusters
MR Kakoee, V Petrovic, L Benini
2012 International Symposium on System on Chip (SoC), 1-5, 2012
112012
A resilient architecture for low latency communication in shared-L1 processor clusters
MR Kakoee, I Loi, L Benini
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 887-892, 2012
112012
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