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Bruno Dutertre
Bruno Dutertre
Amazon Web Services
E-mailová adresa ověřena na: amazon.com - Domovská stránka
Název
Citace
Citace
Rok
A fast linear-arithmetic solver for DPLL (T)
B Dutertre, L De Moura
International Conference on Computer Aided Verification, 81-94, 2006
9922006
The yices smt solver
B Dutertre, L De Moura
Tool paper at http://yices. csl. sri. com/tool-paper. pdf 2 (2), 1-2, 2006
8902006
Yices 2.2
B Dutertre
International Conference on Computer Aided Verification, 737-744, 2014
7342014
Using model-based intrusion detection for SCADA networks
S Cheung, B Dutertre, M Fong, U Lindqvist, K Skinner, A Valdes
Proceedings of the SCADA security scientific symposium 46, 1-12, 2007
4822007
Lightweight key management in wireless sensor networks by leveraging initial trust
B Dutertre, S Cheung, J Levy
Technical Report SRI-SDL-04-02, SRI International, 2004
1622004
Complete proof systems for first order interval temporal logic
B Dutertre
Proceedings of Tenth Annual IEEE Symposium on Logic in Computer Science, 36-43, 1995
150*1995
A Tutorial on Satisfiability Modulo Theories: (Invited Tutorial)
L de Moura, B Dutertre, N Shankar
International conference on computer aided verification, 20-36, 2007
1252007
Modeling and verification of a fault-tolerant real-time startup protocol using calendar automata
B Dutertre, M Sorea
International Symposium on Formal Techniques in Real-Time and Fault-Tolerant …, 2004
1092004
The Yices SMT solver, 2006
B Dutertre, L De Moura
1002006
Using a PVS embedding of CSP to verify authentication protocols
B Dutertre, S Schneider
International Conference on Theorem Proving in Higher Order Logics, 121-136, 1997
991997
Integrating simplex with DPLL (T)
B Dutertre, L De Moura
Computer Science Laboratory, SRI International, Tech. Rep. SRI-CSL-06-01, 2006
982006
Methods and apparatus for scalable distributed management of wireless virtual private networks
B Dutertre
US Patent 7,246,232, 2007
942007
Elements of mathematical analysis in PVS
B Dutertre
International Conference on Theorem Proving in Higher Order Logics, 141-156, 1996
841996
Timed systems in SAL
B Dutertre, M Sorea
SRI Int., Menlo Park, CA, USA, Tech. Rep. SRI-SDL-04-03, 2004
752004
Formal requirements analysis of an avionics control system
B Dutertre, V Stavridou
IEEE Transactions on Software Engineering 23 (5), 267-278, 1997
751997
An architecture for an adaptive intrusion-tolerant server
A Valdes, M Almgren, S Cheung, Y Deswarte, B Dutertre, J Levy, H Saidi, ...
Security Protocols: 10th International Workshop, Cambridge, UK, April 17-19 …, 2004
742004
Property-directed k-induction
D Jovanović, B Dutertre
2016 Formal Methods in Computer-Aided Design (FMCAD), 85-92, 2016
712016
Intrusion tolerant software architectures
V Stavridou, B Dutertre, RA Riemenschneider, H Saidi
Proceedings DARPA Information Survivability Conference and Exposition II …, 2001
692001
Template-based circuit understanding
A Gascón, P Subramanyan, B Dutertre, A Tiwari, D Jovanović, S Malik
2014 Formal Methods in Computer-Aided Design (FMCAD), 83-90, 2014
622014
Safety envelope for security
A Tiwari, B Dutertre, D Jovanović, T De Candia, PD Lincoln, J Rushby, ...
Proceedings of the 3rd international conference on High confidence networked …, 2014
622014
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