RoBA multiplier: A rounding-based approximate multiplier for high-speed yet energy-efficient digital signal processing R Zendegani, M Kamal, M Bahadori, A Afzali-Kusha, M Pedram IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (2), 393-401, 2016 | 176 | 2016 |
High-speed and energy-efficient carry skip adder operating under a wide range of supply voltage levels M Bahadori, M Kamal, A Afzali-Kusha, M Pedram IEEE Transactions on very large scale integration (VLSI) systems 24 (2), 421-433, 2015 | 60 | 2015 |
A novel approach for secure and fast generation of RSA public and private keys on SmartCard M Bahadori, MR Mali, O Sarbishei, M Atarodi, M Sharifkhani Proceedings of the 8th IEEE International NEWCAS Conference 2010, 265-268, 2010 | 35 | 2010 |
A comparative study on performance and reliability of 32-bit binary adders M Bahadori, M Kamal, A Afzali-Kusha, M Pedram Integration 53, 54-67, 2016 | 16 | 2016 |
A programmable SoC-based accelerator for privacy-enhancing technologies and functional encryption M Bahadori, K Järvinen IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (10 …, 2020 | 14 | 2020 |
An energy and area efficient yet high-speed square-root carry select adder structure M Bahadori, M Kamal, A Afzali-Kusha, M Pedram Computers & Electrical Engineering 58, 101-112, 2017 | 11 | 2017 |
Compact and programmable yet high-performance SoC architecture for cryptographic pairings M Bahadori, K Järvinen 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 9 | 2020 |
MassoudPedram,” R Zendegani, M Kamal, M Bahadori, A Afzali-Kusha RoBAMultiplier: A Rounding-Based Approximate Multiplier for High-Speed yet …, 2017 | 7 | 2017 |
CL-CPA: A hybrid carry-lookahead/carry-propagate adder for low-power or high-performance operation mode M Bahadori, M Kamal, A Afzali-Kusha, Y Afsharnezhad, EZ Salehi Integration 57, 62-68, 2017 | 3 | 2017 |
FPGA Implementations of 256-Bit SNOW stream ciphers for postquantum mobile security M Bahadori, K Järvinen, V Niemi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (11 …, 2021 | 2 | 2021 |
Speed reading in the dark: Accelerating functional encryption for quadratic functions with reprogrammable hardware M Bahadori, K Järvinen, T Marc, M Stopar IACR Transactions on Cryptographic Hardware and Embedded Systems, 1-27, 2021 | 1 | 2021 |
A programmable SoC implementation of the DGK cryptosystem for privacy-enhancing technologies M Bahadori, K Järvinen 2020 23rd Euromicro Conference on Digital System Design (DSD), 254-261, 2020 | 1 | 2020 |
Operation Mode, Integration, the VLSI Journal PO Mode, M Bahadori, M Kamal, A Afzali-Kusha, Y Afsharnezhad, ... | | 2016 |
FUNCTIONAL ENCRYPTION ON FPGAs M Bahadori, K Järvinen Small (m= 16) 43863516 (270504), 360, 0 | | |