| SMT proof checking using a logical framework A Stump, D Oe, A Reynolds, L Hadarean, C Tinelli Formal Methods in System Design 42, 91-118, 2012 | 86 | 2012 |
| versat: A Verified Modern SAT Solver D Oe, A Stump, C Oliver, K Clancy Verification, Model Checking, and Abstract Interpretation (VMCAI), 2012 | 58 | 2012 |
| Fast and flexible proof checking for SMT D Oe, A Reynolds, A Stump Proceedings of the 7th International Workshop on Satisfiability Modulo …, 2009 | 28 | 2009 |
| Towards an SMT proof format A Stump, D Oe Proceedings of the Joint Workshops of the 6th International Workshop on …, 2008 | 15 | 2008 |
| Combining a logical framework with an RUP checker for SMT proofs D Oe, A Stump Satisfiability Modulo Theories (SMT) 40, 2011 | 2 | 2011 |
| Implementing a Verified Efficient RUP Checker D Oe Proceedings of the Korea Information Processing Society Conference, 1176-1179, 2012 | | 2012 |
| Formally certified satisfiability solving DK Oe The University of Iowa, 2012 | | 2012 |
| Exploring Predictability of SAT/SMT solvers R Brummayer, D Oe, A Stump Evaluation Methods for Solvers and Quality Metrics for Solutions (EMSQMS), 2010 | | 2010 |
