| Interconnect-aware coherence protocols for chip multiprocessors L Cheng, N Muralimanohar, K Ramani, R Balasubramonian, JB Carter ACM SIGARCH Computer Architecture News 34 (2), 339-351, 2006 | 163 | 2006 |
| Microarchitectural wire management for performance and power in partitioned architectures R Balasubramonian, N Muralimanohar, K Ramani, V Venkatachalapathy 11th International Symposium on High-Performance Computer Architecture, 28-39, 2005 | 86* | 2005 |
| Coherent ray tracing via stream filtering CP Gribble, K Ramani 2008 IEEE Symposium on Interactive Ray Tracing, 59-66, 2008 | 72 | 2008 |
| PowerRed: A flexible modeling framework for power efficiency exploration in GPUs K Ramani, A Ibrahim, D Shimizu Proceedings of the Workshop on General Purpose Processing on GPUs, GPGPU 7, 2007 | 55 | 2007 |
| Streamray: a stream filtering architecture for coherent ray tracing K Ramani, CP Gribble, A Davis ACM SIGARCH Computer Architecture News 37 (1), 325-336, 2009 | 35 | 2009 |
| Texture pipeline with online variable rate dictionary compression K Ramani, A Golas, JW Brothers US Patent 9,947,071, 2018 | 26 | 2018 |
| Method and apparatus for on-chip temperature K Ramani, S Presant, J Brothers US Patent App. 13/531,013, 2013 | 15 | 2013 |
| Power efficient resource scaling in partitioned architectures through dynamic heterogeneity N Muralimanohar, K Ramani, R Balasubramonian 2006 IEEE International Symposium on Performance Analysis of Systems and …, 2006 | 15 | 2006 |
| Vertex attribute data compression with random access using hardware A Golas, KW Ramani, JW Brothers US Patent App. 14/715,172, 2015 | 14 | 2015 |
| Motion based adaptive rendering A Golas, K Ramani, CT Cheng, JW Brothers, L Zhang, S Abraham, ... US Patent 9,928,610, 2018 | 13 | 2018 |
| Application driven embedded system design: A face recognition case study K Ramani, A Davis Proceedings of the 2007 international conference on Compilers, architecture …, 2007 | 13 | 2007 |
| Microarchitectural techniques to reduce interconnect power in clustered processors K Ramani, N Muralimanohar, R Balasubramonian Proc. of the Workshop on Complexity Effective Design, 2004 | 12 | 2004 |
| Efficient low-power texture cache architecture S Abraham, K Ramani, W Seo, K Kwon, P Jeongae US Patent 10,181,176, 2019 | 11 | 2019 |
| Dithered sampling patterns for temporal color averaging A Golas, K Ramani, JW Brothers US Patent 9,589,366, 2017 | 10 | 2017 |
| Leveraging wire properties at the microarchitecture level R Balasubramonian, N Muralimanohar, K Ramani, L Cheng, JB Carter IEEE micro 26 (6), 40-52, 2006 | 9 | 2006 |
| A near optimum MAC protocol based on the incremental collision resolution multiple access protocol for CDMA based communications system S Malarvizhi, K Ramani, H Rajasekaran, M Meenakshi The 5th International Symposium on Wireless Personal Multimedia …, 2002 | 9 | 2002 |
| Reconstruction of missing data point from sparse samples during graphics processing using cubic spline polynomials A Golas, K Ramani, JW Brothers US Patent 9,589,367, 2017 | 6 | 2017 |
| VBTC: GPU‐Friendly Variable Block Size Texture Encoding P Krajcevski, A Golas, K Ramani, M Shebanow, D Manocha Computer Graphics Forum 35 (2), 409-418, 2016 | 6 | 2016 |
| Performance of a power constrained processor K Ramani, JW Brothers, S Presant US Patent App. 13/340,032, 2013 | 6 | 2013 |
| Automating the Design of Embedded Domain Specific Accelerators K Ramani, A Davis Technical report, University of Utah, 2008 | 4 | 2008 |
Rajeev BalasubramonianProfessor, School of Computing, University of UtahVerified email at cs.utah.edu
